[URGENT] Design Verification Engineer (Linux/ Python)

EDUCATION 

• Bachelor or higher degree in Electrical Engineering, Computer Engineering, or related fields.

MANDATORY SKILLS 

• From 2 years’ working experience in LSI development.
• Proven experience in LSI design and verification, working with RTL design, functional verification, and verification methodologies.
• Proficiency in hardware description languages (HDLs) such as Verilog/ System Verilog/ VHDL.
• Familiarity with industry-standard EDA tools for LSI design and verification, such as Cadence(NCSim), Synopsys (VCS/DVE/Verdi), or Mentor Graphics.
• Knowledge of scripting languages (e.g., Python, Perl, Shell scripting) for automation and validation tasks.
• Have basic working experience on Linux environment.
• English: Equivalent to TOEIC 600.

DESIRED SKILLS

• Having experience in performing constraint random verification (using UVM/OVM) or formal verification (property checking using VCF, Jasper Gold) is a plus.
• Able to work under high pressure.